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? 2007 microchip technology inc. ds22053a-page 1 mcp1802 features ? 300 ma maximum output current ? low drop out voltage, 200 mv typical @ 100 ma ? 25 a typical quiescent current ? 0.01 a typical shutdown current ? input operating voltage range: 2.0v to10.0v ? standard output voltage options: - (0.9v, 1.8v, 2.5v, 3.0v, 3.3v, 5.0v, 6.0v) ? output voltage accuracy: -2% (v r > 1.5v), 30 mv (v r 1.5v) ? stable with ceramic output capacitors ? current limit protection ? shutdown pin ? high psrr: 70 db typical @ 10 khz applications ? battery-powered devices ? battery-powered alarm circuits ? smoke detectors ?co 2 detectors ? pagers and cellular phones ? wireless communications equipment ? smart battery packs ? low quiescent current voltage reference ?pdas ? digital cameras ? microcontroller power ? solar-powered instruments ? consumer products ? battery powered data loggers related literature ? an765, ?using microchip?s micropower ldos?, ds00765, microchip technology inc., 2002 ? an766, ?pin-compatible cmos upgrades to bipolar ldos?, ds00766, microchip technology inc., 2002 ? an792, ?a method to determine how much power a sot23 can dissipate in an application?, ds00792, microchip technology inc., 2001 description the mcp1802 is a family of cmos low dropout (ldo) voltage regulators that can deliver up to 300 ma of current while consuming only 25 a of quiescent current (typical). the input operating range is specified from 2.0v to 10.0v, making it an ideal choice for two to six primary cell battery-powered applications, 9v alka- line and one or two cell li-ion-powered applications. the mcp1802 is capable of delivering 100 ma with only 200 mv (typical) of input to output voltage differen- tial (v out = 3.0v). the output voltage tolerance of the mcp1802 at +25c is typically 0.4% with a maximum of 2%. line regulation is 0.01% typical at +25c. the ldo output is stable with a minimum of 1 f of out- put capacitance. ceramic, tantalum or aluminum elec- trolytic capacitors can all be used for input and output. overcurrent limit with current foldback provides short- circuit protection. a shutdown (shdn ) function allows the output to be enabled or disabled. when disabled, the mcp1802 draws only 0.01 a of current (typical). the mcp1802 is available in a sot-23-5 package. package types sot-23-5 123 54 v out nc v in shdn v ss 300 ma, high psrr, low quiescent current ldo
mcp1802 ds22053a-page 2 ? 2007 microchip technology inc. functional block diagram typical application circuit + - mcp1802 v in v out gnd +v in error amplifier voltage reference current limiter shutdown control shdn +v in mcp1802 v in c in 1f c out 1 f ceramic v in 9v battery + v out nc g nd shdn ceramic v out 3.3v @ 40 ma 1 2 3 5 4 sot-23-5
? 2007 microchip technology inc. ds22053a-page 3 mcp1802 1.0 electrical characteristics absolute maximum ratings ? input voltage ................................................................. +12v output current (continuous) ..................... p d /(v in -v out )ma output current (peak) ............................................... 500 ma output voltage ............................... (v ss -0.3v) to (v in +0.3v) shdn voltage ..................................(v ss -0.3v) to (v in +0.3v) continuous power dissipation: 5-pin sot-23-5 .................................................... 250 mw ? notice: stresses above those listed under ?maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any ot her conditions above those indicated in the operational listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. electrical characteristics electrical specifications: unless otherwise specified, al l limits are established for v in = v r + 1.0v, note 1 , c out = 1 f (x7r), c in = 1 f (x7r), v shdn = v in , t a = +25c parameters sym min typ max units conditions input / output characteristics input operating voltage v in 2.0 ? 10.0 v note 1 input quiescent current i q ?2550 ai l = 0 ma shutdown current i shdn ? 0.01 0.10 a shdn = 0v maximum output current i out_ma 300 300 260 260 ? ? ? ? ? ? ? ? ma v r 2v, v in = v r +1.0v 1.5v v r < 2.0v, v in =3.0v 1.0v v r < 1.5v, v in = v r +1.5v 0.9v v r < 1.0v, v in =2.5v current limiter i limit ? 380 ? ma if v r 1.75v, then v in = v r + 2.0v output short circuit current i out_sc ?50? maif v r 1.75v, then v in = v r + 2.0v output voltage regulation v out v r -2.0% v r v r +2.0% v v r 1.45v, i out = 30 ma, note 2 v r -30 mv v r v r +30 mv v r < 1.45v, i out = 30 ma v out temperature coeffi- cient tcv out ? 100 ? ppm/c i out = 30 ma, -40c t a +85c, note 3 line regulation v out / (v out x v in ) -0.2 0.01 +0.2 %/v (v r + 1v) v in 10v, note 1 v r > 1.75v, i out = 30 ma v r 1.75v, i out = 10 ma load regulation v out /v out ? ? 15 ? 50 100 mv i l = 1.0 ma to 100 ma, note 4 i l = 1.0 ma to 300 ma, dropout voltage note 1 , note 5 v dropout ?6090 mvi l = 30 ma, 3.1v v r 6.0v ? 200 250 i l = 100 ma, 3.1v v r 6.0v ? 80 120 i l = 30 ma, 2.0v v r < 3.1v ? 240 350 i l = 100 ma, 2.0v v r < 3.1v ? 2.07 - v r 2.10 - v r vi l = 30 ma, v r < 2.0v ? 2.23 - v r 2.33 - v r i l = 100 ma, v r < 2.0v power supply ripple rejection ratio psrr ? 70 ? db f = 10 khz, i l = 50 ma, v inac = 1v pk-pk, c in = 0 f, if v r < 1.5v, then v in = 2.5v note 1: the minimum v in must meet two conditions: v in 2.0v and v in (v r + 1.0v). 2: v r is the nominal regulator output voltage. for example: v r = 1.8v, 2.5v, 3.0v, 3.3v, or 5.0v. the input voltage v in = v r + 1.0v or vi in = 2.0v (whichever is greater); i out = 100 a. 3: tcv out = (v out-high - v out-low ) *10 6 / (v r * temperature), v out-high = highest voltage measured over the tem- perature range. v out-low = lowest voltage measured over the temperature range. 4: load regulation is measured at a constant junction temperature using low duty c ycle pulse testing. changes in output voltage due to heating effects are determined using thermal regulation specification tcv out . 5: dropout voltage is defined as the input to output differentia l at which the output voltage drops 2% below its measured value with an applied input voltage of v r + 1.0v or 2.0v, whichever is greater.
mcp1802 ds22053a-page 4 ? 2007 microchip technology inc. temperature specifications parameters sym min typ max units conditions temperature ranges operating temperature range t a -40 +85 c storage temperature range tstg -55 +125 c thermal package resistance thermal resistance, sot-23-5 ja jc ? ? 256 81 ? ? c/w eia/jedec jesd51-7 fr-4 0.063 4-layer board
? 2007 microchip technology inc. ds22053a-page 5 mcp1802 2.0 typical performance curves note: unless otherwise indicated: v r = 3.3v, c out = 1 f ceramic (x7r), c in = 1 f ceramic (x7r), i l = 100 a, t a = +25c, v in = v r + 1.0v, sot-23-5. note: junction temperature (t j ) is approximated by soaking the device under test to an am bient temperature equal to the desired junction temperature. the test time is small enough such that the rise in junction temperature over the ambient temperature is not significant. figure 2-1: quiescent current vs. input voltage. figure 2-2: quiescent current vs. input voltage. figure 2-3: quiescent current vs. input voltage. figure 2-4: ground current vs load current. figure 2-5: ground current vs load current. figure 2-6: quiescent current vs. junction temperature. note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purpose s only. the performance characteristics listed herein are not tested or guaranteed. in so me graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power suppl y range) and therefore outs ide the warranted range. 20.00 21.00 22.00 23.00 24.00 25.00 26.00 246810 input voltage (v) quiescent current (a) v out = 0.9v i out = 0 a +25c -45c 0c +90c 24.00 25.00 26.00 27.00 28.00 29.00 45678910 input voltage (v) quiescent current (a) v out = 3.3 v i out = 0 a +25c -45c 0c +90c 25.00 26.00 27.00 28.00 29.00 30.00 31.00 77.588.599.510 input voltage (v) quiescent current (a) v out = 6.0v i out = 0 a +25c -45c 0c +90c 0 10 20 30 40 50 60 70 80 0 30 60 90 120 150 load current (ma) gnd current (a) v out = 0.9v v in = 2.0v 20 30 40 50 60 70 80 90 0 25 50 75 100 125 150 load current (ma) gnd current (a) v out = 6.0v v in = 7.0v v out = 3.3v v in = 4.3v 20.00 22.00 24.00 26.00 28.00 30.00 -45 -22.5 0 22.5 45 67.5 90 junction temperature (c) quiescent current (a) i out = 0ma v out = 0.9v v in = 2.0v v out = 6.0v v in = 7.0v v out = 3.3v v in = 4.3v
mcp1802 ds22053a-page 6 ? 2007 microchip technology inc. note: unless otherwise indicated: v r = 3.3v, c out = 1 f ceramic (x7r), c in = 1 f ceramic (x7r), i l = 100 a, t a = +25c, v in = v r + 1.0v, sot-23-5. figure 2-7: output voltage vs. input voltage. figure 2-8: output voltage vs. input voltage. figure 2-9: output voltage vs. input voltage. figure 2-10: output voltage vs. load current. figure 2-11: output voltage vs. load current. figure 2-12: output voltage vs. load current. 0.895 0.900 0.905 0.910 0.915 0.920 0.925 2345678910 input voltage (v) output voltage (v) v out = 0.9 v i load = 1 m a +25c -45c 0c +90c 3.26 3.27 3.28 3.29 3.30 3.31 3.32 3.33 3.34 45678910 input voltage (v) output voltage (v) v out = 3.3 v i load = 1 m a +25c -45c 0c +90c 5.94 5.96 5.98 6.00 6.02 6.04 6.06 77.588.599.510 input voltage (v) output voltage (v) v out = 6.0 v i load = 1 ma +25c -45c 0c +90c 0.880 0.885 0.890 0.895 0.900 0.905 0.910 0.915 0.920 0 25 50 75 100 125 150 load current (ma) output voltage (v) v in = 2.0v v out = 0.9v -45c 0c +90c +25 3.25 3.26 3.27 3.28 3.29 3.30 3.31 3.32 3.33 3.34 0 25 50 75 100 125 150 load current (ma) output voltage (v) v in = 4.3 v v out = 3.3 v +25c -45c 0c +90c 5.92 5.94 5.96 5.98 6.00 6.02 6.04 6.06 0 25 50 75 100 125 150 load current (ma) output voltage (v) v in = 7.0 v v out = 6.0 v +25c -45c 0c +90c
? 2007 microchip technology inc. ds22053a-page 7 mcp1802 note: unless otherwise indicated: v r = 3.3v, c out = 1 f ceramic (x7r), c in = 1 f ceramic (x7r), i l = 100 a, t a = +25c, v in = v r + 1.0v, sot-23-5. figure 2-13: dropout voltage vs. load current. figure 2-14: dropout voltage vs. load current. figure 2-15: dynamic line response. figure 2-16: dynamic line response. figure 2-17: short circuit cu rrent vs. input voltage. figure 2-18: load regulation vs. temperature. 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0 25 50 75 100 125 150 load current (ma) dropout voltage (v) v out = 3.3v +25c +0c -45c +90c 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0 25 50 75 100 125 150 load current (ma) dropout voltage (v) v out = 6.0v +25c +0c -45c +90c 0 20 40 60 80 100 120 140 160 012345678910 input voltage (v) short circuit current (ma) v out = 3.3v r out < 0.1 ? -1.90 -1.80 -1.70 -1.60 -1.50 -1.40 -45 -22.5 0 22.5 45 67.5 90 temperature (c) load regulation (%) v out = 0.9v i out = 0.1 ma to 150 ma v in = 6v v in = 4v v in = 10v v in = 8v v in = 2v
mcp1802 ds22053a-page 8 ? 2007 microchip technology inc. note: unless otherwise indicated: v r = 3.3v, c out = 1 f ceramic (x7r), c in = 1 f ceramic (x7r), i l = 100 a, t a = +25c, v in = v r + 1.0v, sot-23-5. figure 2-19: load regulation vs. temperature. figure 2-20: load regulation vs. temperature. figure 2-21: line regulation vs. temperature. figure 2-22: line regulation vs. temperature. figure 2-23: line regulation vs. temperature. figure 2-24: psrr vs. frequency. -0.60 -0.50 -0.40 -0.30 -0.20 -0.10 0.00 -45 -22.5 0 22.5 45 67.5 90 temperature (c) load regulation (%) v out = 3.3v i out = 0.1 ma to 150 ma v in = 4.3v v in = 10v v in = 8v v in = 6v -0.30 -0.20 -0.10 0.00 0.10 -45 -22.5 0 22.5 45 67.5 90 temperature (c) load regulation (%) v out = 6.0 v i out = 0.1 ma to 150 ma v in = 9v v in = 10v v in = 7v v in = 8v -0.010 -0.005 0.000 0.005 0.010 0.015 0.020 -45 -22.5 0 22.5 45 67.5 90 temperature (c) line regulation (%/v) v in = 2.0 to 10.0v v out = 0.9v 10 ma 1 ma 50 ma 100 ma 150 ma -0.010 -0.005 0.000 0.005 0.010 0.015 0.020 -45 -22.5 0 22.5 45 67.5 90 temperature (c) line regulation (%/v) v out = 3.3 v v in = 4.3v to 10 v 1 ma 100 ma 10 ma 150 ma 50 ma -0.015 -0.010 -0.005 0.000 0.005 0.010 0.015 0.020 -45 -22.5 0 22.5 45 67.5 90 temperature (c) line regulation (%/v) v out = 6.0 v v in = 7.0v to 10.0 v 100 ma 150 ma 1 ma 50 ma 10 ma -90 -80 -70 -60 -50 -40 -30 -20 -10 0 0.01 0.1 1 10 100 1000 frequency (khz) psrr (db) v r =3.3v v in =4.3v v inac = 100 mv p-p c in =0 f i out =100 a
? 2007 microchip technology inc. ds22053a-page 9 mcp1802 note: unless otherwise indicated: v r = 3.3v, c out = 1 f ceramic (x7r), c in = 1 f ceramic (x7r), i l = 100 a, t a = +25c, v in = v r + 1.0v, sot-23-5. figure 2-25: psrr vs frequency. figure 2-26: power up timing. figure 2-27: dynamic load response. figure 2-28: dynamic load response. figure 2-29: power up timing from shdn. -90 -80 -70 -60 -50 -40 -30 -20 -10 0 0.01 0.1 1 10 100 1000 frequency (khz) psrr (db) v r = 6.0v v in = 7.0v v inac = 100 mv p-p c in = 0 f i out = 100 a
mcp1802 ds22053a-page 10 ? 2007 microchip technology inc. 3.0 pin descriptions the descriptions of the pins are listed in table 3-1 . table 3-1: pin function table 3.1 ground terminal (gnd) regulator ground. tie gnd to the negative side of the output and the negative side of the input capacitor. only the ldo bias current (25 a typical) flows out of this pin; there is no high current. the ldo output regulation is referenced to this pin. minimize voltage drops between this pin and the negative side of the load. 3.2 regulated output voltage (v out ) connect v out to the positive side of the load and the positive terminal of the output capacitor. the positive side of the output capa citor should be physically located as close to the ldo v out pin as is practical. the current flowing out of this pin is equal to the dc load current. 3.3 unregulated input voltage (v in ) connect v in to the input unregulated source voltage. like all low dropout linea r regulators, low source impedance is necessary for the stable operation of the ldo. the amount of capacitance required to ensure low source impedance will de pend on the proximity of the input source capacitors or battery type. for most applications, 0.1 f of capacitance will ensure stable operation of the ldo circuit. the type of capacitor used can be ceramic, tantalum or aluminum electro- lytic. the low esr characte ristics of the ceramic will yield better noise and psrr performance at high- frequency. 3.4 shutdown input (shdn ) the shdn input is used to turn the ldo output voltage on and off. when the shdn input is at a logic-high level, the ldo output volt age is enabled. when the shdn input is pulled to a logic-low level, the ldo output voltage is disabled and the ldo enters a low quiescent current shutdown state where the typical qui- escent current is 0.01 a. the shdn pin does not have an internal pullup or pulldown resistor. the the shdn pin must be connected to either v in or gnd to prevent the device from becoming unstable. pin no. sot-23-5 name function 2 gnd ground terminal 5v out regulated voltage output 1v in unregulated supply voltage 3shdn shutdown 4 nc no connection
? 2007 microchip technology inc. ds22053a-page 11 mcp1802 4.0 detailed description 4.1 output regulation a portion of the ldo output voltage is fed back to the internal error amplifier and compared with the precision internal bandgap reference. the error amplifier output will adjust the amount of curr ent that flows through the p-channel pass transistor, thus regulating the output voltage to the desired value. any changes in input voltage or output current will cause the error amplifier to respond and adjust the output voltage to the target voltage (refer to figure 4-1 ). 4.2 overcurrent the mcp1802 internal circuitry monitors the amount of current flowing through the p-channel pass transistor. in the event that the load current reaches the current limiter level of 380 ma (t ypical), the current limiter circuit will operate and the output voltage will drop. as the output voltage drops, the internal current foldback circuit will further reduce the output voltage causing the output current to decreas e. when the output is shorted, a typical output current of 50 ma flows. 4.3 shutdown the shdn input is used to turn the ldo output voltage on and off. when the shdn input is at a logic-high level, the ldo output voltage is enabled. when the shdn input is pulled to a logic-low level, the ldo output voltage is disabled and the ldo enters a low quiescent current shutdown state where the typical quiescent current is 0.01 a. the shdn pin does not have an internal pullup or pulldown resistor. therefore the shdn pin must be pulled either high or low to prevent the device from becoming unstable. the internal device current will increase when the device is operational and current flows through the pullup or pull- down resistor to the shdn pin internal logic. the shdn pin internal logic is equivalent to an inverter input. 4.4 output capacitor the mcp1802 requires a minimum output capacitance of 1 f for output voltage stability. ceramic capacitors are recommended because of their size, cost and environmental robustness qualities. aluminum-electrolytic and tantalum capacitors can be used on the ldo output as well. the output capacitor should be located as clos e to the ldo output as is practical. ceramic materials x7r and x5r have low temperature coefficients and are well within the acceptable esr range required. a typical 1 f x7r 0805 capacitor has an esr of 50 milli-ohms. larger ldo output capacitors can be used with the mcp1802 to improve dynamic performance and power supply ripple rejection performance. aluminum-elec- trolytic capacitors are not recommended for low temperature applications of 25c. 4.5 input capacitor low input source impedance is necessary for the ldo output to operate properly. when operating from batteries, or in applicat ions with long lead length (> 10 inches) between the input source and the ldo, some input capacitance is recommended. a minimum of 0.1 f to 4.7 f is recommended for most applications. for applications that have output step load requirements, the input capa citance of the ldo is very important. the input capacitance provides the ldo with a good local low-impedance source to pull the transient currents from in order to respond quickly to the output load step. for good step response performance, the input capacitor should be of equivalent (or higher) value than the output capacitor. the capacitor should be placed as close to the input of the ldo as is practical. lar ger input capacitors will also help reduce any high-frequency noise on the input and output of the ldo and reduce the effects of any inductance that exists between the input source voltage and the input capacitance of the ldo.
mcp1802 ds22053a-page 12 ? 2007 microchip technology inc. figure 4-1: block diagram. + - mcp1802 v in v out gnd +v in error amplifier voltage reference current limiter shutdown control shdn +v in
? 2007 microchip technology inc. ds22053a-page 13 mcp1802 5.0 functional description the mcp1802 cmos low dropout linear regulator is intended for applications that need the low current consumption while maintaining output voltage regulation. the operating c ontinuous load range of the mcp1802 is from 0 ma to 300 ma. the input operating voltage range is from 2.0v to 10.0v, making it capable of operating from three or more alkaline cells or single and multiple li-ion cell batteries. 5.1 input the input of the mcp1802 is connected to the source of the p-channel pmos pass transistor. as with all ldo circuits, a relatively low source impedance (10 ) is needed to prevent the input impedance from causing the ldo to become unstable. the size and type of the capacitor needed depends heavily on the input source type (battery, power supply) and the output current range of the application. for most applications a 0.1 f ceramic capacitor will be su fficient to ensure circuit stability. larger values can be used to improve circuit ac performance. 5.2 output the maximum rated continuous output current for the mcp1802 is 300 ma. a minimum output capacitance of 1.0 f is required for small signal stability in applications that have up to 300 ma output current capability. the capacitor type can be ceramic, tantalum or aluminum electrolytic.
mcp1802 ds22053a-page 14 ? 2007 microchip technology inc. 6.0 application circuits & issues 6.1 typical application the mcp1802 is most commonly used as a voltage regulator. its low quiescent current and low dropout voltage make it ideal for many battery-powered applications. figure 6-1: typical application circuit. 6.1.1 application input conditions 6.2 power calculations 6.2.1 power dissipation the internal power dissipat ion of the mcp1802 is a function of input voltage, output voltage and output current. the power dissipation, as a result of the quiescent current draw, is so low, it is insignificant (25.0 a x v in ). the following equation can be used to calculate the internal power dissipation of the ldo. equation 6-1: the maximum continuous operating temperature specified for the mcp1802 is +85 c . to estimate the internal junction temperature of the mcp1802, the total internal power dissipation is multiplied by the thermal resistance from junction to ambient (r ja ). the thermal resistance from junction to ambient for the sot-23-5 package is estimated at 256 c/w. equation 6-2: the maximum power dissipation capability for a package can be calculated given the junction-to- ambient thermal resistance and the maximum ambient temperature for the applicatio n. the following equation can be used to determine the package maximum internal power dissipation. equation 6-3: equation 6-4: equation 6-5: package type = sot-23-5 input voltage range = 2.4v to 5.0v v in maximum = 5.0v v out typical = 1.8v i out =50ma maximum mcp1802 gnd v out v in c in 1f c out 1 f ceramic v out v in 2.4v to 5.0v 1.8v i out 50 ma shdn ceramic nc p ldo v in max ) () v out min () ? () i out max ) () = where: p ldo = ldo pass device internal power dissipation v in(max) = maximum input voltage v out(min) = ldo minimum output voltage t jmax () p total r ja t amax + = where: t j(max) = maximum continuous junction temperature p total = total device power dissipation r ja = thermal resistance from junction to ambient t amax = maximum ambient temperature p dmax () t jmax () t amax () ? () r ja --------------------------------------------------- = where: p d(max) = maximum device power dissipation t j(max) = maximum continuous junction temperature t a(max) = maximum ambient temperature r ja = thermal resistance from junction to ambient t jrise () p dmax () r ja = where: t j(rise) = rise in device junction temperature over the ambient temperature p total = maximum device power dissipation r ja = thermal resistance from junction to ambient t j t jrise () t a + = where: t j = junction temperature t j(rise) = rise in device junction temperature over the ambient temperature t a = ambient temperature
? 2007 microchip technology inc. ds22053a-page 15 mcp1802 6.3 voltage regulator internal power dissipation, junction temperature rise, junction temperature and maximum power dissipation are calculated in the following example. the power dissipation, as a result of ground current, is small enough to be neglected. 6.3.1 power dissipation example device junction temperature rise the internal junction temperature rise is a function of internal power dissipation and the thermal resistance from junction to ambient for the application. the thermal resistance from junction to ambient (r ja ) is derived from an eia/jedec standard for measuring thermal resistance for small surface mount packages. the eia/jedec specificat ion is jesd51-7, ?high effective thermal conductivity test board for leaded surface mount packages?. the standard describes the test method and board specif ications for measuring the thermal resistance from junction to ambient. the actual thermal resistance for a particular application can vary depending on many factors, such as copper area and thickness. refer to an792, ?a method to determine how much power a sot23 can dissipate in an application?, (ds00792), for more information regarding this subject. junction temperature estimate to estimate the internal junction temperature, the calculated temperature rise is added to the ambient or offset temperature. for th is example, the worst-case junction temperature is estimated in the following table. maximum package power dissipation at +25c ambient temperature 6.4 voltage reference the mcp1802 can be used not only as a regulator, but also as a low quiescent current voltage reference. in many microcontroller applications, the initial accuracy of the reference can be ca librated using production test equipment or by using a ratio measurement. when the initial accuracy is calibrated, the thermal stability and line regulation tolerance are the only errors introduced by the mcp1802 ldo. the low cost, low quiescent current and small ceramic output capacitor are all advantages when using the mcp1802 as a voltage reference. figure 6-2: using the mcp1802 as a voltage reference. 6.5 pulsed load applications for some applications, there are pulsed load current events that may exceed the specified 300 ma maximum specification of the mcp1802. the internal current limit of the mcp1802 will prevent high peak load demands from causing non-recoverable damage. the 300 ma rating is a maximum average continuous rating. as long as the average current does not exceed 300 ma nor the max power dissipation of the packaged device, pulsed higher load currents can be applied to the mcp1802 . the typical current limit for the mcp1802 is 380 ma (t a +25c). package package type = sot-23-5 input voltage v in = 2.4v to 5.0v ldo output voltages and currents v out =1.8v i out =50ma maximum ambient temperature t a(max) =+40c internal power dissipation internal power dissipation is the product of the ldo output current times the voltage across the ldo (v in to v out ). p ldo(max) =(v in(max) - v out(min) ) x i out(max) p ldo = (5.0v - (0.98 x 1.8v)) x 50 ma p ldo = 161.8 milli-watts t j(rise) =p total x rq ja t jrise = 161.8 milli-watts x 256.0 c/watt t jrise = 41.42 c t j =t jrise + t a(max) t j = 81.42c sot-23-5 (256c/watt = r ja ) p d(max) = (85c - 25c) / 256c/w p d(max) = 234 milli-watts pic ? mcp1802 gnd v in c in 1f c out 1f bridge sensor v out v ref ado ad1 ratio metric reference 25 a bias microcontroller
mcp1802 ds22053a-page 16 ? 2007 microchip technology inc. 7.0 packaging information 7.1 package marking information 5-lead sot-23 example: legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part nu mber cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e 1 standard options for sot-23 symbol voltage * symbol voltage * 9x 8# 0.9 9x z# 3.0 9x b# 1.2 9b 2# 3.3 9x k# 1.8 9b m# 5.0 9x t# 2.5 9b z# 6.0 * custom output voltages available upon request. contact your local microchip sales office for more information. xxnn 1 9xnn
? 2007 microchip technology inc. ds22053a-page 17 mcp1802 5-lead plastic small outline transistor (ot) [sot-23] notes: 1. dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.127 mm per side. 2. dimensioning and tolerancing per asme y14.5m. bsc: basic dimension. theoretically exact value shown without tolerances. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging units millimeters dimension limits min nom max number of pins n 5 lead pitch e 0.95 bsc outside lead pitch e1 1.90 bsc overall height a 0.90 ? 1.45 molded package thickness a2 0.89 ? 1.30 standoff a1 0.00 ? 0.15 overall width e 2.20 ? 3.20 molded package width e1 1.30 ? 1.80 overall length d 2.70 ? 3.10 foot length l 0.10 ? 0.60 footprint l1 0.35 ? 0.80 foot angle 0 ? 30 lead thickness c 0.08 ? 0.26 lead width b 0.20 ? 0.51 n b e e1 d 1 2 3 e e 1 a a1 a2 c l l1 microchip technology drawing c04-091b
mcp1802 ds22053a-page 18 ? 2007 microchip technology inc. notes:
? 2007 microchip technology inc. ds22053a-page 19 mcp1802 appendix a: revision history revision a (june 2007) ? original release of this document.
mcp1802 ds22053a-page 20 ? 2007 microchip technology inc. notes:
? 2007 microchip technology inc. ds22053a-page 21 mcp1802 product identification system to order or obtain information, e.g., on pricing or de livery, refer to the factory or the listed sales office . device: mcp1802: 150 ma, low quiescent current ldo tape and reel: t = tape and reel output voltage *: 09 = 0.9v ?standard? 12 = 1.2v ?standard? 18 = 1.8v ?standard? 25 = 2.5v ?standard? 30 = 3.0v ?standard? 33 = 3.3v ?standard? 50 = 5.0v ?standard? 60 = 6.0v ?standard? *contact factory for other output voltage options. extra feature code: 0 = fixed tolerance: 2 = 2.0% (standard) temperature: i = -40 c to +85 c package type: ot = plastic small outline transistor (sot-23) 5-lead, part no. x xx output feature code device voltage x tolerance x/ temp. xx package x- tape and reel examples: a) mcp1802t-0902i/ot: tape and reel, 0.9v b) mcp1802t-1202i/ot: tape and reel, 1.2v c) mcp1802t-1802i/ot: tape and reel, 1.8v d) mcp1802t-2502i/ot: tape and reel, 2.5v e) mcp1802t-3002i/ot: tape and reel, 3.0v f) mcp1802t-3302i/ot: tape and reel, 3.3v g) mcp1802t-5002i/ot: tape and reel, 5.0v h) mcp1802t-6002i/ot: tape and reel, 6.0v
mcp1802 ds22053a-page 22 ? 2007 microchip technology inc. notes:
? 2007 microchip technology inc. ds22053a-page 23 information contained in this publication regarding device applications and the like is prov ided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application me ets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safe ty applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting fr om such use. no licenses are conveyed, implicitly or ot herwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, accuron, dspic, k ee l oq , k ee l oq logo, micro id , mplab, pic, picmicro, picstart, pro mate, rfpic and smartshunt are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. amplab, filterlab, linear active thermistor, migratable memory, mxdev, mxlab, seeval, smartsensor and the embedded control solutions company are registered trademarks of microchip te chnology incorporated in the u.s.a. analog-for-the-digital age, a pplication maestro, codeguard, dspicdem, dspicdem.net, dspicworks, ecan, economonitor, fansense, flexrom, fuzzylab, in-circuit serial programming, icsp, icepic, mindi, miwi, mpasm, mplab certified logo, mplib, mplink, pickit, picdem, picdem.net, piclab, pictail, powercal, powerinfo, powermate, powertool, real ice, rflab, select mode, smart serial, smarttel, total endurance, uni/o, wiperlock and zena are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of mi crochip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2007, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal meth ods used to breach the code protection fe ature. all of these methods, to our knowledge, require using the microchip pr oducts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are committed to continuously improving the code protection features of our products. attempts to break microchip?s c ode protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your softwar e or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperi pherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified.
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